#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b106961c |
|
14-Dec-2023 |
Tom Rini <trini@konsulko.com> |
global: Restrict use of '#include <linux/kconfig.h>' In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
bdfa1b67 |
|
18-Nov-2023 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop BOOTSTAGE_ID_FIT_KERNEL_INFO This is a misnomer since we don't necessarily know that the image is a FIT. Use the existing BOOTSTAGE_ID_CHECK_IMAGETYPE instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
12c00f9e |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
include: Add <linux/types.h> in a few places These files references a number of types that are defined in <linux/types.h> (and so forth), so include it here rather than rely on indirect inclusion. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
17ba5010 |
|
26-Sep-2023 |
Simon Glass <sjg@chromium.org> |
spl: Remove #ifdefs with BOOTSTAGE This feature has some helpers in its header file so that its functions resolve to nothing when the feature is disabled. Add a few more and use these to simplify the code. With this there are no more #ifdefs in board_init_r() Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
d2b22ae2 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
vbe: Support reading the next SPL phase via VBE Add an SPL loader to obtain the next-phase binary from a FIT provided by the VBE driver. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
55bc2276 |
|
12-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
bootstage: Show func name for bootstage_mark/error bootstage_mark() and bootstate_error() are not recording any name and in report it is showing as id=<value>. That's not useful and it is better to show function name which calls it. That's why use macros with passing __func__ as recorded name for bootstage. Origin report looks like this: ZynqMP> bootstage report Timer summary in microseconds (10 records): Mark Elapsed Stage 0 0 reset 2,482,383 2,482,383 board_init_f 4,278,821 1,796,438 board_init_r 4,825,331 546,510 id=64 4,858,409 33,078 id=65 4,862,382 3,973 main_loop 4,921,713 59,331 usb_start 9,345,345 4,423,632 id=175 When this patch is applied. ZynqMP> bootstage report Timer summary in microseconds (31 records): Mark Elapsed Stage 0 0 reset 2,465,624 2,465,624 board_init_f 4,278,628 1,813,004 board_init_r 4,825,139 546,511 eth_common_init 4,858,228 33,089 eth_initialize 4,862,201 3,973 main_loop 4,921,530 59,329 usb_start 8,885,334 3,963,804 cli_loop Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
f86ca5ad |
|
30-Apr-2022 |
Simon Glass <sjg@chromium.org> |
Introduce Verifying Program Loader (VPL) Add support for VPL, a new phase of U-Boot. This runs after TPL. It is responsible for selecting which SPL binary to run, based on a verified-boot process. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b55881dd |
|
22-Oct-2021 |
Marek Vasut <marex@denx.de> |
bootstage: Add SPL support Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cb80ff20 |
|
03-May-2021 |
Tom Rini <trini@konsulko.com> |
bootstage: Eliminate when not enabled When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
dafde79d |
|
03-Jul-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix 'stacked' typo This should be 'stashed'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b67eefdb |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
bootstage: Use BOOTSTAGE instead of BOOTSTATE Some of the enum members are wrong. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
5256beec |
|
21-Oct-2019 |
Simon Glass <sjg@chromium.org> |
bootstage: Mark the start/end of TPL and SPL separately At present bootstage in TPL and SPL use the same ID so it is not possible to see the timing of each. Separate out the IDs and use the correct one depending on which phase we are at. Example output: Timer summary in microseconds (14 records): Mark Elapsed Stage 0 0 reset 224,787 224,787 TPL 282,248 57,461 end TPL 341,067 58,819 SPL 925,436 584,369 end SPL 931,710 6,274 board_init_f 1,035,482 103,772 board_init_r 1,387,852 352,370 main_loop 1,387,911 59 id=175 Accumulated time: 196 dm_r 8,300 dm_spl 14,139 dm_f 229,121 fsp-m 262,992 fsp-s Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
b07cc48c |
|
11-Apr-2019 |
Heiko Schocher <hs@denx.de> |
main: add new bootstage ID for entering cli loop adding a new bootstage ID: BOOTSTAGE_ID_ENTER_CLI_LOOP Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
066b25b6 |
|
05-Sep-2017 |
Simon Glass <sjg@chromium.org> |
bootstage: Drop unused options The CONFIG_BOOTSTAGE_USER_COUNT option is no-longer needed since we can now support any number of user IDs. Also BOOTSTAGE_ID_COUNT is not needed now. Drop these unused options. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a132f770 |
|
22-May-2017 |
Simon Glass <sjg@chromium.org> |
bootstage: Record time taken to set up the live device tree This time is interesting as a comparision with the flat device tree time. Add it to the record. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
824bb1b4 |
|
22-May-2017 |
Simon Glass <sjg@chromium.org> |
bootstage: Support SPL At present bootstage only supports U-Boot proper. But SPL can also consume boot time so it is useful to have the record start there. Add bootstage support to SPL. Also support stashing the timing information when SPL finishes so that it can be picked up and reported by U-Boot proper. This provides a full boot time record, excluding only the time taken by the boot ROM. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9d2542d0 |
|
22-May-2017 |
Simon Glass <sjg@chromium.org> |
bootstage: Adjust to use const * where possible There are a few places that should use const *, such as bootstage_unstash(). Update these to make it clearer when parameters are changed. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e003310a |
|
22-May-2017 |
Simon Glass <sjg@chromium.org> |
bootstage: Tidy up error return values We should return a proper error number instead of just -1. This helps the caller to determine what when wrong. Update a few functions to fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
63c5bf48 |
|
22-May-2017 |
Simon Glass <sjg@chromium.org> |
bootstage: Record the time taken to set up driver model Driver model is set up ones before relocation and once after. Record the time taken in each case. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
25e7dc6a |
|
22-May-2017 |
Simon Glass <sjg@chromium.org> |
bootstage: Support relocating boostage data Some boards cannot access pre-relocation data after relocation. Reserve space for this and copy it during preparation for relocation. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cbcd6970 |
|
22-May-2017 |
Simon Glass <sjg@chromium.org> |
bootstage: Fix up code style and comments There are several code style and comment nits. Fix them and also remove the comment about passing bootstage to the kernel being TBD. This is already supported. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b383d6c0 |
|
22-May-2017 |
Simon Glass <sjg@chromium.org> |
bootstage: Convert to use malloc() At present bootstage uses the data section of the image to store its information. There are a few problems with this: - It does not work on all boards (e.g. those which run from flash before relocation) - Allocated strings still point back to the pre-relocation data after relocation Now that U-Boot has a pre-relocation malloc() we can use this instead, with a pointer to the data in global_data. Update bootstage to do this and set up an init routine to allocate the memory. Now that we have a real init function, we can drop the fake 'reset' record and add a normal one instead. Note that part of the problem with allocated strings remains. They are reallocated but this will only work where pre-relocation memory is accessible after relocation. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c87dc38d |
|
22-May-2017 |
Simon Glass <sjg@chromium.org> |
bootstage: Require timer_get_boot_us() to be defined At present we provide a default version of this function for use by bootstage. However it uses the system timer and therefore likely requires driver model. This makes it impossible to time driver-model init. Drop the function and require boards to provide their own. Add a sandbox version also. There is a default implememtation in lib/time.c for boards which use CONFIG_SYS_TIMER_COUNTER. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
496c5483 |
|
07-Jun-2016 |
Heiko Schocher <hs@denx.de> |
bootstage: call show_boot_progress also in SPL show_boot_progress() is now called from SPL also. Signed-off-by: Heiko Schocher <hs@denx.de>
|
#
62afc601 |
|
17-May-2016 |
Michal Simek <michal.simek@xilinx.com> |
image: Add boot_get_fpga() to load fpga with bootm Add function boot_get_fpga() which find and load bitstream to programmable logic if fpga entry is present. Function is supported on Xilinx devices for full and partial bitstreams in BIN and BIT format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Remove additional blankline in image.h
|
#
84a07dbf |
|
21-May-2015 |
Karl Apsite <karl.apsite@dornerworks.com> |
add boot_get_loadables() to load listed images Added a trimmed down instance of boot_get_<thing>() to satisfy the minimum requierments of the added feature. The function follows the normal patterns set by other boot_get<thing>'s, which should make it a bit easier to combine them all together into one boot_get_image() function in a later refactor. Documentation for the new function can be found in source: include/image.h Signed-off-by: Karl Apsite <Karl.Apsite@dornerworks.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
28b5404c |
|
04-May-2015 |
Simon Glass <sjg@chromium.org> |
bootstage: Add IDs for SPI flash reading and decompression We maintain an accumulator for time spent reading from SPI flash, since this can be significant on some platforms. Also add one for decompression time. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
|
#
ee2b2434 |
|
02-Mar-2015 |
Simon Glass <sjg@chromium.org> |
Kconfig: Move CONFIG_BOOTSTAGE to Kconfig Move CONFIG_BOOT_STAGE and its associated options to Kconfig. Adjust existing users and code. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1b15fac1 |
|
02-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
bootstage: Fix typos in the comment There are two typos in the comment block in bootstage.h, fix them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
|
#
abbdb262 |
|
27-Jan-2015 |
Simon Glass <sjg@chromium.org> |
scsi: bootstage: Measure time taken to scan the bus On some hardware this time can be significant. Add bootstage support for measuring this. The result can be obtained using 'bootstage report' or passed on to the Linux via the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
90268b87 |
|
19-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: Support loading kernel setup from a FIT Add a new setup@ section to the FIT which can be used to provide a setup binary for booting Linux on x86. This makes it possible to boot x86 from a FIT. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7f442e36 |
|
05-Aug-2013 |
Heiko Schocher <hs@denx.de> |
bootstage: get more BOOTSTAGE_ID* in show_boot_progress() In case CONFIG_BOOTSTAGE is not defined, call from bootstage_mark_name() show_boot_progress(), so get more BOOTSTAGE_ID* ids in show_boot_progress() if CONFIG_BOOTSTAGE is not defined. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Simon Glass <sjg@chromium.org>
|
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
|
#
13167dac |
|
16-May-2013 |
Simon Glass <sjg@chromium.org> |
bootstage: Remove unused entries related to kernel/ramdisk/fdt load Now that the code for loading these three images from a FIT is common, we don't need individual boostage IDs for each of them. Note: there are some minor changes in the bootstage numbering, particuarly for kernel loading. I don't believe this matters. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
a2cc9bf4 |
|
16-May-2013 |
Simon Glass <sjg@chromium.org> |
bootstage: Introduce sub-IDs for use with image loading Loading a ramdisk, kernel or FDT goes through similar stages. Create a block of IDs for each task, and define a consistent numbering within the block. This will allow use of common code for image loading. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e9c8b445 |
|
07-May-2013 |
Simon Glass <sjg@chromium.org> |
bootstage: Don't build for HOSTCC We don't measure boot timing on the host, or with SPL, so use both conditions in the bootstage header. This allows us to avoid using conditional compilation around bootstage_...() calls. (#ifdef) Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
fb7db41c |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
bootstage: Allow marking a particular line of code Add a function which allows a (file, function, line number) to be marked in bootstage. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
|
#
150678a5 |
|
17-Apr-2013 |
Doug Anderson <dianders@chromium.org> |
bootstage: Copy bootstage strings post-relocation Any pointers to name strings that were passed to bootstage_mark_name() pre-relocation should be copied post-relocation so that they don't get trashed as the original location of U-Boot is re-used for other purposes. This change introduces a new API call that should be called from board_init_r() after malloc has been initted on any board that uses bootstage. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
e802ee0f |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
bootstage: Add stubs for new bootstage functions Some functions don't have a stub for when CONFIG_BOOTSTAGE is not defined. Add one to avoid #ifdefs in the code when this is used in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
|
#
996e95d4 |
|
28-Sep-2012 |
Simon Glass <sjg@chromium.org> |
bootstage: Add new bootstage IDs for board, LCD Add bootstage IDs for board init and LCD. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
fcf509b8 |
|
28-Sep-2012 |
Simon Glass <sjg@chromium.org> |
bootstage: Add feature to stash/unstash bootstage info It is useful to be able to write the bootstage information to memory for use by a later utility, or the Linux kernel. Provide a function to do this as well as a function to read bootstage information back and incorporate it into the current table. This also makes it possible for U-Boot to chain to another U-Boot and pass on its bootstage information. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
94fd1316 |
|
28-Sep-2012 |
Simon Glass <sjg@chromium.org> |
bootstage: Store boot timings in device tree Add an option, CONFIG_BOOTSTAGE_FDT to pass boot timings to the kernel in the device tree, if available. To use this, you must have CONFIG_OF_LIBFDT defined. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0e996773 |
|
28-Sep-2012 |
Simon Glass <sjg@chromium.org> |
bootstage: Add time accumulation feature Sometimes we want to add up the amount of time spent in a particular activity when it is happening in a number of discrete chunks. Add bootstage_start() to mark the start of an acitivity and bootstage_accum() to accumulate the time since the last start. Calling these function in pairs results in the accumulated time being collected. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
094e06a5 |
|
28-Sep-2012 |
Simon Glass <sjg@chromium.org> |
bootstage: Export bootstage_add_record() function This function is not static, but not exported either. Add a prototype in the header file and move the required enum to the header also. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7ac2fe2d |
|
17-Sep-2012 |
Ilya Yanok <ilya.yanok@cogentembedded.com> |
OMAP: networking support for SPL This patch adds support for networking in SPL. Some devices are capable of loading SPL via network so it makes sense to load the main U-Boot binary via network too. This patch tries to use existing network code as much as possible. Unfortunately, it depends on environment which in turn depends on other code so SPL size is increased significantly. No effort was done to decouple network code and environment so far. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@ti.com>
|
#
3786980d |
|
04-Apr-2012 |
Simon Glass <sjg@chromium.org> |
Move bootstage timer out of lib/time.c The standalone example does not have get_timer() defined, so we cannot rely on it being available. Move the timer function into boootstage.c to avoid this problem. This corrects a build breakage for the standalone example on some boards. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
|
#
3a608ca0 |
|
13-Feb-2012 |
Simon Glass <sjg@chromium.org> |
bootstage: Implement core microsecond boot time measurement This defines the basics of a new boot time measurement feature. This allows logging of very accurate time measurements as the boot proceeds, by using an available microsecond counter. To enable the feature, define CONFIG_BOOTSTAGE in your board config file. Also available is CONFIG_BOOTSTAGE_REPORT which will cause a report to be printed just before handing off to the OS. Most IDs are not named at this stage. For that I would first like to renumber them all. Timer summary in microseconds: Mark Elapsed Stage 0 0 reset 205,000 205,000 board_init_f 6,053,000 5,848,000 bootm_start 6,053,000 0 id=1 6,058,000 5,000 id=101 6,058,000 0 id=100 6,061,000 3,000 id=103 6,064,000 3,000 id=104 6,093,000 29,000 id=107 6,093,000 0 id=106 6,093,000 0 id=105 6,093,000 0 id=108 7,089,000 996,000 id=7 7,089,000 0 id=15 7,089,000 0 id=8 7,097,000 8,000 start_kernel Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
770605e4 |
|
13-Feb-2012 |
Simon Glass <sjg@chromium.org> |
bootstage: Replace show_boot_progress/error() with bootstage_...() These calls should not be made directly any more, since bootstage will call the show_boot_...() functions as needed. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
aacc8c16 |
|
10-Dec-2011 |
Simon Glass <sjg@chromium.org> |
bootstage: Convert FIT progress numbers to enums This changes over all the FIT image progress numbers to use enums from bootstage.h. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c8e66db7 |
|
14-Jan-2012 |
Simon Glass <sjg@chromium.org> |
bootstage: Convert net progress numbers to enums This changes over the network-related progress numbers to use enums from bootstage.h. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
cd24a6bf |
|
10-Dec-2011 |
Simon Glass <sjg@chromium.org> |
bootstage: Convert NAND progress numbers to enums This changes over the NAND progress numbers to use enums from bootstage.h. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
90e153d7 |
|
10-Dec-2011 |
Simon Glass <sjg@chromium.org> |
bootstage: Convert IDE progress numbers to enums This changes over the IDE progress numbers to use enums from bootstage.h. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
8ade9506 |
|
10-Dec-2011 |
Simon Glass <sjg@chromium.org> |
bootstage: Convert progress numbers 20-41 to enums Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5e410883 |
|
10-Dec-2011 |
Simon Glass <sjg@chromium.org> |
bootstage: Convert progress numbers 10-19 to enums Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
|
#
5dc88716 |
|
14-Jan-2012 |
Simon Glass <sjg@chromium.org> |
bootstage: Convert progress numbers 1-9 into enums Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5ddb118d |
|
10-Dec-2011 |
Simon Glass <sjg@chromium.org> |
bootstage: Use show_boot_error() for -ve progress numbers Rather than the caller negating our progress numbers to indicate an error has occurred, which seems hacky, add a function to indicate this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
|
#
097e1783 |
|
14-Jan-2012 |
Simon Glass <sjg@chromium.org> |
bootstage: Create an initial header for boot progress integers At present boot_stage_progress() is called with various magic numbers. The new bootstage.h header will be used to turn these into symbolic names throughout the code. The intent is not that these numbers are passed to Linux. In fact by using an enum to track them we should eventually be able to remove the explict numbers and just have the stages count up from 0. Signed-off-by: Simon Glass <sjg@chromium.org>
|