#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
|
#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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124289bd |
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31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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8bddb974 |
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17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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124289bd |
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31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
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17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
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17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
124289bd |
|
31-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add R528/T113-s3/D1(s) DRAM initialisation code The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and cleaned up, to match previous DRAM routines for other SoCs, and also to be closer to U-Boot's coding style and support routines. The actual DRAM chip timing parameters are included in the main file, since they cover all DRAM types, and are protected by a new Kconfig CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only the relevant settings, at build time. The relevant DRAM chips/board specific configuration parameters are delivered via Kconfig, so this code here should work for all supported SoCs and DRAM chips combinations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
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#
8bddb974 |
|
17-Dec-2022 |
Andre Przywara <andre.przywara@arm.com> |
Kconfig: sunxi: prepare for using drivers/ram/sunxi At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so should share the same DRAM init routines as well. To prepare for this, add a new sunxi directory inside drivers/ram, and add some stub entries to prepare for the addition of the share DRAM code for those SoCs. The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this would be the right directory anyway. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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