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d678a59d |
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18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
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8719a3f5 |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
power: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
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0d588cb7 |
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21-Mar-2024 |
Sumit Garg <sumit.garg@linaro.org> |
imx8mp: power-domain: Expose high performance PLL clock Expose the high performance PLL as clock framework clock, so the PCIe PHY can use it when there is no external refclock provided. Inspired from counterpart Linux kernel v6.8-rc3 driver: drivers/pmdomain/imx/imx8mp-blk-ctrl.c. Use last Linux kernel driver reference commit 7476ddfd36ac ("pmdomain: imx8mp-blk-ctrl: Convert to platform remove callback returning void"). Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> |
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c7ab1442 |
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21-Mar-2024 |
Sumit Garg <sumit.garg@linaro.org> |
imx8mp: power-domain: Add PCIe support Add support for GPCv2 power domains and clock handling for PCIe and PCIe PHY. Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> |
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c9309f40 |
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16-Dec-2023 |
Sean Anderson <seanga2@gmail.com> |
treewide: Remove clk_free This function is a no-op. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com |
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898e7610 |
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12-Apr-2022 |
Marek Vasut <marex@denx.de> |
imx: power-domain: Add i.MX8MP HSIOMIX driver Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe in the correct order. Currently supported is the USB 3.0 part which can be tested, PCIe support should be easy to add. Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> |
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8719a3f5 |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
power: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
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0d588cb7 |
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21-Mar-2024 |
Sumit Garg <sumit.garg@linaro.org> |
imx8mp: power-domain: Expose high performance PLL clock Expose the high performance PLL as clock framework clock, so the PCIe PHY can use it when there is no external refclock provided. Inspired from counterpart Linux kernel v6.8-rc3 driver: drivers/pmdomain/imx/imx8mp-blk-ctrl.c. Use last Linux kernel driver reference commit 7476ddfd36ac ("pmdomain: imx8mp-blk-ctrl: Convert to platform remove callback returning void"). Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> |
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c7ab1442 |
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21-Mar-2024 |
Sumit Garg <sumit.garg@linaro.org> |
imx8mp: power-domain: Add PCIe support Add support for GPCv2 power domains and clock handling for PCIe and PCIe PHY. Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> |
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c9309f40 |
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16-Dec-2023 |
Sean Anderson <seanga2@gmail.com> |
treewide: Remove clk_free This function is a no-op. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com |
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898e7610 |
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12-Apr-2022 |
Marek Vasut <marex@denx.de> |
imx: power-domain: Add i.MX8MP HSIOMIX driver Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe in the correct order. Currently supported is the USB 3.0 part which can be tested, PCIe support should be easy to add. Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> |
#
0d588cb7 |
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21-Mar-2024 |
Sumit Garg <sumit.garg@linaro.org> |
imx8mp: power-domain: Expose high performance PLL clock Expose the high performance PLL as clock framework clock, so the PCIe PHY can use it when there is no external refclock provided. Inspired from counterpart Linux kernel v6.8-rc3 driver: drivers/pmdomain/imx/imx8mp-blk-ctrl.c. Use last Linux kernel driver reference commit 7476ddfd36ac ("pmdomain: imx8mp-blk-ctrl: Convert to platform remove callback returning void"). Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> |
#
c7ab1442 |
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21-Mar-2024 |
Sumit Garg <sumit.garg@linaro.org> |
imx8mp: power-domain: Add PCIe support Add support for GPCv2 power domains and clock handling for PCIe and PCIe PHY. Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> |
#
c9309f40 |
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16-Dec-2023 |
Sean Anderson <seanga2@gmail.com> |
treewide: Remove clk_free This function is a no-op. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com |
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898e7610 |
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12-Apr-2022 |
Marek Vasut <marex@denx.de> |
imx: power-domain: Add i.MX8MP HSIOMIX driver Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe in the correct order. Currently supported is the USB 3.0 part which can be tested, PCIe support should be easy to add. Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> |
#
c9309f40 |
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16-Dec-2023 |
Sean Anderson <seanga2@gmail.com> |
treewide: Remove clk_free This function is a no-op. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com |
#
898e7610 |
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12-Apr-2022 |
Marek Vasut <marex@denx.de> |
imx: power-domain: Add i.MX8MP HSIOMIX driver Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe in the correct order. Currently supported is the USB 3.0 part which can be tested, PCIe support should be easy to add. Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> |
#
898e7610 |
|
12-Apr-2022 |
Marek Vasut <marex@denx.de> |
imx: power-domain: Add i.MX8MP HSIOMIX driver Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe in the correct order. Currently supported is the USB 3.0 part which can be tested, PCIe support should be easy to add. Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> |