#
03de305e |
|
20-May-2024 |
Tom Rini <trini@konsulko.com> |
Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c45973bc |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
pinctrl: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
32b2ea98 |
|
14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
pinctrl: rockchip: Add pinctrl route types Some pins in rockchip are routed via Top GRF and PMU GRF instead of direct regmap. Add support to handle all these routing paths so that the SoC pinctrl drivers will use them accordingly. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
95397385 |
|
07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: Use OF_REAL instead of !OF_PLATDATA Now that we have a 'positive' Kconfig option, use this instead of the negative one, which is harder to understand. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e3e2470f |
|
24-Jun-2020 |
Walter Lozano <walter.lozano@collabora.com> |
drivers: rename drivers to match compatible string When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
623aca88 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Clean the unused type and label As the mux/pull/drive feature implement at own file, the type and label are not necessary. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
69a38f81 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
743a7737 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_pull() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
956362c8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength RK3288 pmu_gpio0 drive strength setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
625ab11f |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_drive() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd8f00ce |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
54e75702 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_mux() into per Soc Such as rk3288's pins of pmu_gpio0 are a special feature, which have no higher 16 writing corresponding bits, use common set_mux() func would introduce more code, so implement their set_mux() in each Soc's own file to reduce the size of code. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
8541beb8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Remove redundant spaces Some files have the redundant spaces, remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cc325e4b |
|
06-May-2019 |
Kever Yang <kever.yang@rock-chips.com> |
Revert "pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl" This reverts commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2. This is a superseded version, revert this to apply new patch set. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
50298091 |
|
12-Feb-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value from register firstly. Add the flag to distinguish it from normal registers. Signed-off-by: David Wu <david.wu@rock-chips.com> |
#
e7ae4cf2 |
|
02-Jan-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add common rockchip pinctrl driver Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c45973bc |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
pinctrl: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
32b2ea98 |
|
14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
pinctrl: rockchip: Add pinctrl route types Some pins in rockchip are routed via Top GRF and PMU GRF instead of direct regmap. Add support to handle all these routing paths so that the SoC pinctrl drivers will use them accordingly. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
95397385 |
|
07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: Use OF_REAL instead of !OF_PLATDATA Now that we have a 'positive' Kconfig option, use this instead of the negative one, which is harder to understand. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e3e2470f |
|
24-Jun-2020 |
Walter Lozano <walter.lozano@collabora.com> |
drivers: rename drivers to match compatible string When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
623aca88 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Clean the unused type and label As the mux/pull/drive feature implement at own file, the type and label are not necessary. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
69a38f81 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
743a7737 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_pull() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
956362c8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength RK3288 pmu_gpio0 drive strength setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
625ab11f |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_drive() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd8f00ce |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
54e75702 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_mux() into per Soc Such as rk3288's pins of pmu_gpio0 are a special feature, which have no higher 16 writing corresponding bits, use common set_mux() func would introduce more code, so implement their set_mux() in each Soc's own file to reduce the size of code. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
8541beb8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Remove redundant spaces Some files have the redundant spaces, remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cc325e4b |
|
06-May-2019 |
Kever Yang <kever.yang@rock-chips.com> |
Revert "pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl" This reverts commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2. This is a superseded version, revert this to apply new patch set. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
50298091 |
|
12-Feb-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value from register firstly. Add the flag to distinguish it from normal registers. Signed-off-by: David Wu <david.wu@rock-chips.com> |
#
e7ae4cf2 |
|
02-Jan-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add common rockchip pinctrl driver Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
c45973bc |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
pinctrl: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
32b2ea98 |
|
14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
pinctrl: rockchip: Add pinctrl route types Some pins in rockchip are routed via Top GRF and PMU GRF instead of direct regmap. Add support to handle all these routing paths so that the SoC pinctrl drivers will use them accordingly. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
95397385 |
|
07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: Use OF_REAL instead of !OF_PLATDATA Now that we have a 'positive' Kconfig option, use this instead of the negative one, which is harder to understand. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e3e2470f |
|
24-Jun-2020 |
Walter Lozano <walter.lozano@collabora.com> |
drivers: rename drivers to match compatible string When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
623aca88 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Clean the unused type and label As the mux/pull/drive feature implement at own file, the type and label are not necessary. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
69a38f81 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
743a7737 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_pull() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
956362c8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength RK3288 pmu_gpio0 drive strength setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
625ab11f |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_drive() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd8f00ce |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
54e75702 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_mux() into per Soc Such as rk3288's pins of pmu_gpio0 are a special feature, which have no higher 16 writing corresponding bits, use common set_mux() func would introduce more code, so implement their set_mux() in each Soc's own file to reduce the size of code. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
8541beb8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Remove redundant spaces Some files have the redundant spaces, remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cc325e4b |
|
06-May-2019 |
Kever Yang <kever.yang@rock-chips.com> |
Revert "pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl" This reverts commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2. This is a superseded version, revert this to apply new patch set. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
50298091 |
|
12-Feb-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value from register firstly. Add the flag to distinguish it from normal registers. Signed-off-by: David Wu <david.wu@rock-chips.com> |
#
e7ae4cf2 |
|
02-Jan-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add common rockchip pinctrl driver Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
32b2ea98 |
|
14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
pinctrl: rockchip: Add pinctrl route types Some pins in rockchip are routed via Top GRF and PMU GRF instead of direct regmap. Add support to handle all these routing paths so that the SoC pinctrl drivers will use them accordingly. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
95397385 |
|
07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: Use OF_REAL instead of !OF_PLATDATA Now that we have a 'positive' Kconfig option, use this instead of the negative one, which is harder to understand. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e3e2470f |
|
24-Jun-2020 |
Walter Lozano <walter.lozano@collabora.com> |
drivers: rename drivers to match compatible string When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
623aca88 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Clean the unused type and label As the mux/pull/drive feature implement at own file, the type and label are not necessary. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
69a38f81 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
743a7737 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_pull() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
956362c8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength RK3288 pmu_gpio0 drive strength setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
625ab11f |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_drive() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd8f00ce |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
54e75702 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_mux() into per Soc Such as rk3288's pins of pmu_gpio0 are a special feature, which have no higher 16 writing corresponding bits, use common set_mux() func would introduce more code, so implement their set_mux() in each Soc's own file to reduce the size of code. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
8541beb8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Remove redundant spaces Some files have the redundant spaces, remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cc325e4b |
|
06-May-2019 |
Kever Yang <kever.yang@rock-chips.com> |
Revert "pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl" This reverts commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2. This is a superseded version, revert this to apply new patch set. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
50298091 |
|
12-Feb-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value from register firstly. Add the flag to distinguish it from normal registers. Signed-off-by: David Wu <david.wu@rock-chips.com> |
#
e7ae4cf2 |
|
02-Jan-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add common rockchip pinctrl driver Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
95397385 |
|
07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: Use OF_REAL instead of !OF_PLATDATA Now that we have a 'positive' Kconfig option, use this instead of the negative one, which is harder to understand. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e3e2470f |
|
24-Jun-2020 |
Walter Lozano <walter.lozano@collabora.com> |
drivers: rename drivers to match compatible string When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
623aca88 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Clean the unused type and label As the mux/pull/drive feature implement at own file, the type and label are not necessary. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
69a38f81 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
743a7737 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_pull() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
956362c8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength RK3288 pmu_gpio0 drive strength setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
625ab11f |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_drive() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd8f00ce |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
54e75702 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_mux() into per Soc Such as rk3288's pins of pmu_gpio0 are a special feature, which have no higher 16 writing corresponding bits, use common set_mux() func would introduce more code, so implement their set_mux() in each Soc's own file to reduce the size of code. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
8541beb8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Remove redundant spaces Some files have the redundant spaces, remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cc325e4b |
|
06-May-2019 |
Kever Yang <kever.yang@rock-chips.com> |
Revert "pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl" This reverts commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2. This is a superseded version, revert this to apply new patch set. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
50298091 |
|
12-Feb-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value from register firstly. Add the flag to distinguish it from normal registers. Signed-off-by: David Wu <david.wu@rock-chips.com> |
#
e7ae4cf2 |
|
02-Jan-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add common rockchip pinctrl driver Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e3e2470f |
|
24-Jun-2020 |
Walter Lozano <walter.lozano@collabora.com> |
drivers: rename drivers to match compatible string When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
623aca88 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Clean the unused type and label As the mux/pull/drive feature implement at own file, the type and label are not necessary. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
69a38f81 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
743a7737 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_pull() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
956362c8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength RK3288 pmu_gpio0 drive strength setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
625ab11f |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_drive() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd8f00ce |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
54e75702 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_mux() into per Soc Such as rk3288's pins of pmu_gpio0 are a special feature, which have no higher 16 writing corresponding bits, use common set_mux() func would introduce more code, so implement their set_mux() in each Soc's own file to reduce the size of code. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
8541beb8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Remove redundant spaces Some files have the redundant spaces, remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cc325e4b |
|
06-May-2019 |
Kever Yang <kever.yang@rock-chips.com> |
Revert "pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl" This reverts commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2. This is a superseded version, revert this to apply new patch set. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
50298091 |
|
12-Feb-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value from register firstly. Add the flag to distinguish it from normal registers. Signed-off-by: David Wu <david.wu@rock-chips.com> |
#
e7ae4cf2 |
|
02-Jan-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add common rockchip pinctrl driver Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
e3e2470f |
|
24-Jun-2020 |
Walter Lozano <walter.lozano@collabora.com> |
drivers: rename drivers to match compatible string When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
623aca88 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Clean the unused type and label As the mux/pull/drive feature implement at own file, the type and label are not necessary. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
69a38f81 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
743a7737 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_pull() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
956362c8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength RK3288 pmu_gpio0 drive strength setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
625ab11f |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_drive() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd8f00ce |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
54e75702 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_mux() into per Soc Such as rk3288's pins of pmu_gpio0 are a special feature, which have no higher 16 writing corresponding bits, use common set_mux() func would introduce more code, so implement their set_mux() in each Soc's own file to reduce the size of code. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
8541beb8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Remove redundant spaces Some files have the redundant spaces, remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cc325e4b |
|
06-May-2019 |
Kever Yang <kever.yang@rock-chips.com> |
Revert "pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl" This reverts commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2. This is a superseded version, revert this to apply new patch set. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
50298091 |
|
12-Feb-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value from register firstly. Add the flag to distinguish it from normal registers. Signed-off-by: David Wu <david.wu@rock-chips.com> |
#
e7ae4cf2 |
|
02-Jan-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add common rockchip pinctrl driver Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
623aca88 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Clean the unused type and label As the mux/pull/drive feature implement at own file, the type and label are not necessary. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
69a38f81 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
743a7737 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_pull() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
956362c8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength RK3288 pmu_gpio0 drive strength setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
625ab11f |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_drive() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd8f00ce |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
54e75702 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_mux() into per Soc Such as rk3288's pins of pmu_gpio0 are a special feature, which have no higher 16 writing corresponding bits, use common set_mux() func would introduce more code, so implement their set_mux() in each Soc's own file to reduce the size of code. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
8541beb8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Remove redundant spaces Some files have the redundant spaces, remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cc325e4b |
|
06-May-2019 |
Kever Yang <kever.yang@rock-chips.com> |
Revert "pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl" This reverts commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2. This is a superseded version, revert this to apply new patch set. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
50298091 |
|
12-Feb-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value from register firstly. Add the flag to distinguish it from normal registers. Signed-off-by: David Wu <david.wu@rock-chips.com> |
#
e7ae4cf2 |
|
02-Jan-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add common rockchip pinctrl driver Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
623aca88 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Clean the unused type and label As the mux/pull/drive feature implement at own file, the type and label are not necessary. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
69a38f81 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
743a7737 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_pull() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
956362c8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength RK3288 pmu_gpio0 drive strength setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
625ab11f |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_drive() func into per Soc As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd8f00ce |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
54e75702 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Split the common set_mux() into per Soc Such as rk3288's pins of pmu_gpio0 are a special feature, which have no higher 16 writing corresponding bits, use common set_mux() func would introduce more code, so implement their set_mux() in each Soc's own file to reduce the size of code. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
8541beb8 |
|
16-Apr-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Remove redundant spaces Some files have the redundant spaces, remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cc325e4b |
|
06-May-2019 |
Kever Yang <kever.yang@rock-chips.com> |
Revert "pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl" This reverts commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2. This is a superseded version, revert this to apply new patch set. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
50298091 |
|
12-Feb-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value from register firstly. Add the flag to distinguish it from normal registers. Signed-off-by: David Wu <david.wu@rock-chips.com> |
#
e7ae4cf2 |
|
02-Jan-2019 |
David Wu <david.wu@rock-chips.com> |
pinctrl: rockchip: Add common rockchip pinctrl driver Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |