#
07110c6f |
|
26-Jul-2022 |
Peng Fan <peng.fan@nxp.com> |
imx: pinctrl: add pinctrl and pinfunc file for i.MX93 Add the pinctrl driver and pinfunc header file to support iMX93 Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
9eb5e7d9 |
|
17-Jan-2022 |
Angus Ainslie <angus@akkea.ca> |
pinctrl: nxp: don't automatically select DEVRES If we select DEVRES here then it breaks building an imx8m SPL without DEVRES support. Signed-off-by: Angus Ainslie <angus@akkea.ca> |
#
0bf4a77e |
|
07-Aug-2021 |
Ye Li <ye.li@nxp.com> |
pinctrl: Add pinctrl driver for imx8ulp Add pinctrl driver for i.MX8ULP Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
916ce981 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
pinctrl: add i.MXRT driver Add i.MXRT pinctrl driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> |
#
0f666533 |
|
19-Jun-2019 |
Lukasz Majewski <lukma@denx.de> |
pinctrl: mxs: Add support for i.MX2[38] mxs pinctrl driver The code responsible for setting proper values in the MUX registers (in the mxs_pinctrl_set_state()) has been ported from Linux kernel - SHA1: 17bb763e7eaf tag v5.1.11 from linux-stable. As the pinctrl node in the imx28.dtsi file has gpio pins nodes as subnodes, it was necessary to use 'dm_scan_fdt_dev()' (as a .bind method) to also make them 'visible' by the DM's "gpio_mxs" driver. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> |
#
78814467 |
|
28-Jan-2019 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: add imx8m driver Add i.mx8m pinctrl driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
f0b73d97 |
|
19-Nov-2018 |
Lukasz Majewski <lukma@denx.de> |
ARM: vybrid: Provide pinctrl driver for Vybrid (vf610) This implementation comply with other iMX devices pinctrl drivers already available in U-boot. Signed-off-by: Lukasz Majewski <lukma@denx.de> |
#
38b6686f |
|
18-Oct-2018 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add pinctrl driver for i.MX8 Add pinctrl driver for i.MX8. The pads configuration is controlled by SCU, so need to ask SCU to configure pads through scfw API. Add pinctrl-scu to invoke sc_pad_set to configure pads. Add a new flag IMX8_USE_SCU to differentiate i.MX8 from other platforms which could directly configure pads from Acore side. Add CONFIG_PINCTRL_IMX8 as the built gate. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
#
4aa9d4d0 |
|
22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add i.MX7ULP pinctrl driver Add i.MX7ULP pinctrl driver. Select CONFIG_PINCTRL_IMX7ULP to use this driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by : Stefano Babic <sbabic@denx.de> |
#
98d62e61 |
|
04-Nov-2016 |
Patrick Bruenn <p.bruenn@beckhoff.com> |
arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC Add CX9020 board based on mx53loco. Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse serial_mxc with DTE and prepare for device tree migration of other functions and imx53 devices. The CX9020 differs from i.MX53 Quick Start Board by: - use uart2 instead of uart1 - DVI-D connector instead of VGA - no audio - CCAT FPGA connected to emi - enable rtc Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com> |
#
c4068dfb |
|
02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Support i.MX7D Introudce i.MX7 pinctrl driver support. For now only i.MX7D supported. There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr. To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg and conf_reg can begin at 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
745df68d |
|
02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Introduce pinctrl driver for i.MX6 Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinctrl_ops implementation, only set_state is implemented. To i.MX6/7, the pinctrl dts entry is as following: &iomuxc { pinctrl-names = "default"; pinctrl_csi1: csi1grp { fsl,pins = < MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 >; }; [.....] }; there is no property named function or groups. So pinctrl_generic_set_state can not be used here. 5. This driver is a simple implementation for i.mx iomux controller, only parse the fsl,pins property and write value to registers. 6. With DEBUG enabled, we can see log when "i2c bus 0": " set_state_simple op missing imx_pinctrl_set_state: i2c1grp mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x14c val 0x10 select_input: offset 0x5d8 val 0x1 write config: offset 0x3bc val 0x7f mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x148 val 0x10 select_input: offset 0x5d4 val 0x1 write config: offset 0x3b8 val 0x7f " this means imx6 pinctrl driver works as expected. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
9eb5e7d9 |
|
17-Jan-2022 |
Angus Ainslie <angus@akkea.ca> |
pinctrl: nxp: don't automatically select DEVRES If we select DEVRES here then it breaks building an imx8m SPL without DEVRES support. Signed-off-by: Angus Ainslie <angus@akkea.ca> |
#
0bf4a77e |
|
07-Aug-2021 |
Ye Li <ye.li@nxp.com> |
pinctrl: Add pinctrl driver for imx8ulp Add pinctrl driver for i.MX8ULP Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
916ce981 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
pinctrl: add i.MXRT driver Add i.MXRT pinctrl driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> |
#
0f666533 |
|
19-Jun-2019 |
Lukasz Majewski <lukma@denx.de> |
pinctrl: mxs: Add support for i.MX2[38] mxs pinctrl driver The code responsible for setting proper values in the MUX registers (in the mxs_pinctrl_set_state()) has been ported from Linux kernel - SHA1: 17bb763e7eaf tag v5.1.11 from linux-stable. As the pinctrl node in the imx28.dtsi file has gpio pins nodes as subnodes, it was necessary to use 'dm_scan_fdt_dev()' (as a .bind method) to also make them 'visible' by the DM's "gpio_mxs" driver. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> |
#
78814467 |
|
28-Jan-2019 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: add imx8m driver Add i.mx8m pinctrl driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
f0b73d97 |
|
19-Nov-2018 |
Lukasz Majewski <lukma@denx.de> |
ARM: vybrid: Provide pinctrl driver for Vybrid (vf610) This implementation comply with other iMX devices pinctrl drivers already available in U-boot. Signed-off-by: Lukasz Majewski <lukma@denx.de> |
#
38b6686f |
|
18-Oct-2018 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add pinctrl driver for i.MX8 Add pinctrl driver for i.MX8. The pads configuration is controlled by SCU, so need to ask SCU to configure pads through scfw API. Add pinctrl-scu to invoke sc_pad_set to configure pads. Add a new flag IMX8_USE_SCU to differentiate i.MX8 from other platforms which could directly configure pads from Acore side. Add CONFIG_PINCTRL_IMX8 as the built gate. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
#
4aa9d4d0 |
|
22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add i.MX7ULP pinctrl driver Add i.MX7ULP pinctrl driver. Select CONFIG_PINCTRL_IMX7ULP to use this driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by : Stefano Babic <sbabic@denx.de> |
#
98d62e61 |
|
04-Nov-2016 |
Patrick Bruenn <p.bruenn@beckhoff.com> |
arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC Add CX9020 board based on mx53loco. Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse serial_mxc with DTE and prepare for device tree migration of other functions and imx53 devices. The CX9020 differs from i.MX53 Quick Start Board by: - use uart2 instead of uart1 - DVI-D connector instead of VGA - no audio - CCAT FPGA connected to emi - enable rtc Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com> |
#
c4068dfb |
|
02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Support i.MX7D Introudce i.MX7 pinctrl driver support. For now only i.MX7D supported. There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr. To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg and conf_reg can begin at 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
745df68d |
|
02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Introduce pinctrl driver for i.MX6 Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinctrl_ops implementation, only set_state is implemented. To i.MX6/7, the pinctrl dts entry is as following: &iomuxc { pinctrl-names = "default"; pinctrl_csi1: csi1grp { fsl,pins = < MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 >; }; [.....] }; there is no property named function or groups. So pinctrl_generic_set_state can not be used here. 5. This driver is a simple implementation for i.mx iomux controller, only parse the fsl,pins property and write value to registers. 6. With DEBUG enabled, we can see log when "i2c bus 0": " set_state_simple op missing imx_pinctrl_set_state: i2c1grp mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x14c val 0x10 select_input: offset 0x5d8 val 0x1 write config: offset 0x3bc val 0x7f mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x148 val 0x10 select_input: offset 0x5d4 val 0x1 write config: offset 0x3b8 val 0x7f " this means imx6 pinctrl driver works as expected. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
0bf4a77e |
|
07-Aug-2021 |
Ye Li <ye.li@nxp.com> |
pinctrl: Add pinctrl driver for imx8ulp Add pinctrl driver for i.MX8ULP Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
916ce981 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
pinctrl: add i.MXRT driver Add i.MXRT pinctrl driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> |
#
0f666533 |
|
19-Jun-2019 |
Lukasz Majewski <lukma@denx.de> |
pinctrl: mxs: Add support for i.MX2[38] mxs pinctrl driver The code responsible for setting proper values in the MUX registers (in the mxs_pinctrl_set_state()) has been ported from Linux kernel - SHA1: 17bb763e7eaf tag v5.1.11 from linux-stable. As the pinctrl node in the imx28.dtsi file has gpio pins nodes as subnodes, it was necessary to use 'dm_scan_fdt_dev()' (as a .bind method) to also make them 'visible' by the DM's "gpio_mxs" driver. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> |
#
78814467 |
|
28-Jan-2019 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: add imx8m driver Add i.mx8m pinctrl driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
f0b73d97 |
|
19-Nov-2018 |
Lukasz Majewski <lukma@denx.de> |
ARM: vybrid: Provide pinctrl driver for Vybrid (vf610) This implementation comply with other iMX devices pinctrl drivers already available in U-boot. Signed-off-by: Lukasz Majewski <lukma@denx.de> |
#
38b6686f |
|
18-Oct-2018 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add pinctrl driver for i.MX8 Add pinctrl driver for i.MX8. The pads configuration is controlled by SCU, so need to ask SCU to configure pads through scfw API. Add pinctrl-scu to invoke sc_pad_set to configure pads. Add a new flag IMX8_USE_SCU to differentiate i.MX8 from other platforms which could directly configure pads from Acore side. Add CONFIG_PINCTRL_IMX8 as the built gate. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
#
4aa9d4d0 |
|
22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add i.MX7ULP pinctrl driver Add i.MX7ULP pinctrl driver. Select CONFIG_PINCTRL_IMX7ULP to use this driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by : Stefano Babic <sbabic@denx.de> |
#
98d62e61 |
|
04-Nov-2016 |
Patrick Bruenn <p.bruenn@beckhoff.com> |
arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC Add CX9020 board based on mx53loco. Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse serial_mxc with DTE and prepare for device tree migration of other functions and imx53 devices. The CX9020 differs from i.MX53 Quick Start Board by: - use uart2 instead of uart1 - DVI-D connector instead of VGA - no audio - CCAT FPGA connected to emi - enable rtc Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com> |
#
c4068dfb |
|
02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Support i.MX7D Introudce i.MX7 pinctrl driver support. For now only i.MX7D supported. There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr. To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg and conf_reg can begin at 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
745df68d |
|
02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Introduce pinctrl driver for i.MX6 Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinctrl_ops implementation, only set_state is implemented. To i.MX6/7, the pinctrl dts entry is as following: &iomuxc { pinctrl-names = "default"; pinctrl_csi1: csi1grp { fsl,pins = < MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 >; }; [.....] }; there is no property named function or groups. So pinctrl_generic_set_state can not be used here. 5. This driver is a simple implementation for i.mx iomux controller, only parse the fsl,pins property and write value to registers. 6. With DEBUG enabled, we can see log when "i2c bus 0": " set_state_simple op missing imx_pinctrl_set_state: i2c1grp mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x14c val 0x10 select_input: offset 0x5d8 val 0x1 write config: offset 0x3bc val 0x7f mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x148 val 0x10 select_input: offset 0x5d4 val 0x1 write config: offset 0x3b8 val 0x7f " this means imx6 pinctrl driver works as expected. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
916ce981 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
pinctrl: add i.MXRT driver Add i.MXRT pinctrl driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> |
#
0f666533 |
|
19-Jun-2019 |
Lukasz Majewski <lukma@denx.de> |
pinctrl: mxs: Add support for i.MX2[38] mxs pinctrl driver The code responsible for setting proper values in the MUX registers (in the mxs_pinctrl_set_state()) has been ported from Linux kernel - SHA1: 17bb763e7eaf tag v5.1.11 from linux-stable. As the pinctrl node in the imx28.dtsi file has gpio pins nodes as subnodes, it was necessary to use 'dm_scan_fdt_dev()' (as a .bind method) to also make them 'visible' by the DM's "gpio_mxs" driver. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> |
#
78814467 |
|
28-Jan-2019 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: add imx8m driver Add i.mx8m pinctrl driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
f0b73d97 |
|
19-Nov-2018 |
Lukasz Majewski <lukma@denx.de> |
ARM: vybrid: Provide pinctrl driver for Vybrid (vf610) This implementation comply with other iMX devices pinctrl drivers already available in U-boot. Signed-off-by: Lukasz Majewski <lukma@denx.de> |
#
38b6686f |
|
18-Oct-2018 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add pinctrl driver for i.MX8 Add pinctrl driver for i.MX8. The pads configuration is controlled by SCU, so need to ask SCU to configure pads through scfw API. Add pinctrl-scu to invoke sc_pad_set to configure pads. Add a new flag IMX8_USE_SCU to differentiate i.MX8 from other platforms which could directly configure pads from Acore side. Add CONFIG_PINCTRL_IMX8 as the built gate. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
#
4aa9d4d0 |
|
22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add i.MX7ULP pinctrl driver Add i.MX7ULP pinctrl driver. Select CONFIG_PINCTRL_IMX7ULP to use this driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by : Stefano Babic <sbabic@denx.de> |
#
98d62e61 |
|
04-Nov-2016 |
Patrick Bruenn <p.bruenn@beckhoff.com> |
arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC Add CX9020 board based on mx53loco. Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse serial_mxc with DTE and prepare for device tree migration of other functions and imx53 devices. The CX9020 differs from i.MX53 Quick Start Board by: - use uart2 instead of uart1 - DVI-D connector instead of VGA - no audio - CCAT FPGA connected to emi - enable rtc Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com> |
#
c4068dfb |
|
02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Support i.MX7D Introudce i.MX7 pinctrl driver support. For now only i.MX7D supported. There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr. To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg and conf_reg can begin at 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
745df68d |
|
02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Introduce pinctrl driver for i.MX6 Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinctrl_ops implementation, only set_state is implemented. To i.MX6/7, the pinctrl dts entry is as following: &iomuxc { pinctrl-names = "default"; pinctrl_csi1: csi1grp { fsl,pins = < MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 >; }; [.....] }; there is no property named function or groups. So pinctrl_generic_set_state can not be used here. 5. This driver is a simple implementation for i.mx iomux controller, only parse the fsl,pins property and write value to registers. 6. With DEBUG enabled, we can see log when "i2c bus 0": " set_state_simple op missing imx_pinctrl_set_state: i2c1grp mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x14c val 0x10 select_input: offset 0x5d8 val 0x1 write config: offset 0x3bc val 0x7f mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x148 val 0x10 select_input: offset 0x5d4 val 0x1 write config: offset 0x3b8 val 0x7f " this means imx6 pinctrl driver works as expected. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
0f666533 |
|
19-Jun-2019 |
Lukasz Majewski <lukma@denx.de> |
pinctrl: mxs: Add support for i.MX2[38] mxs pinctrl driver The code responsible for setting proper values in the MUX registers (in the mxs_pinctrl_set_state()) has been ported from Linux kernel - SHA1: 17bb763e7eaf tag v5.1.11 from linux-stable. As the pinctrl node in the imx28.dtsi file has gpio pins nodes as subnodes, it was necessary to use 'dm_scan_fdt_dev()' (as a .bind method) to also make them 'visible' by the DM's "gpio_mxs" driver. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> |
#
78814467 |
|
28-Jan-2019 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: add imx8m driver Add i.mx8m pinctrl driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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f0b73d97 |
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19-Nov-2018 |
Lukasz Majewski <lukma@denx.de> |
ARM: vybrid: Provide pinctrl driver for Vybrid (vf610) This implementation comply with other iMX devices pinctrl drivers already available in U-boot. Signed-off-by: Lukasz Majewski <lukma@denx.de> |
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38b6686f |
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18-Oct-2018 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add pinctrl driver for i.MX8 Add pinctrl driver for i.MX8. The pads configuration is controlled by SCU, so need to ask SCU to configure pads through scfw API. Add pinctrl-scu to invoke sc_pad_set to configure pads. Add a new flag IMX8_USE_SCU to differentiate i.MX8 from other platforms which could directly configure pads from Acore side. Add CONFIG_PINCTRL_IMX8 as the built gate. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
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4aa9d4d0 |
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22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add i.MX7ULP pinctrl driver Add i.MX7ULP pinctrl driver. Select CONFIG_PINCTRL_IMX7ULP to use this driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by : Stefano Babic <sbabic@denx.de> |
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98d62e61 |
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04-Nov-2016 |
Patrick Bruenn <p.bruenn@beckhoff.com> |
arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC Add CX9020 board based on mx53loco. Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse serial_mxc with DTE and prepare for device tree migration of other functions and imx53 devices. The CX9020 differs from i.MX53 Quick Start Board by: - use uart2 instead of uart1 - DVI-D connector instead of VGA - no audio - CCAT FPGA connected to emi - enable rtc Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com> |
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c4068dfb |
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02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Support i.MX7D Introudce i.MX7 pinctrl driver support. For now only i.MX7D supported. There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr. To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg and conf_reg can begin at 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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745df68d |
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02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Introduce pinctrl driver for i.MX6 Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinctrl_ops implementation, only set_state is implemented. To i.MX6/7, the pinctrl dts entry is as following: &iomuxc { pinctrl-names = "default"; pinctrl_csi1: csi1grp { fsl,pins = < MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 >; }; [.....] }; there is no property named function or groups. So pinctrl_generic_set_state can not be used here. 5. This driver is a simple implementation for i.mx iomux controller, only parse the fsl,pins property and write value to registers. 6. With DEBUG enabled, we can see log when "i2c bus 0": " set_state_simple op missing imx_pinctrl_set_state: i2c1grp mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x14c val 0x10 select_input: offset 0x5d8 val 0x1 write config: offset 0x3bc val 0x7f mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x148 val 0x10 select_input: offset 0x5d4 val 0x1 write config: offset 0x3b8 val 0x7f " this means imx6 pinctrl driver works as expected. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
38b6686f |
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18-Oct-2018 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add pinctrl driver for i.MX8 Add pinctrl driver for i.MX8. The pads configuration is controlled by SCU, so need to ask SCU to configure pads through scfw API. Add pinctrl-scu to invoke sc_pad_set to configure pads. Add a new flag IMX8_USE_SCU to differentiate i.MX8 from other platforms which could directly configure pads from Acore side. Add CONFIG_PINCTRL_IMX8 as the built gate. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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#
4aa9d4d0 |
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22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
pinctrl: Add i.MX7ULP pinctrl driver Add i.MX7ULP pinctrl driver. Select CONFIG_PINCTRL_IMX7ULP to use this driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by : Stefano Babic <sbabic@denx.de>
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#
98d62e61 |
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04-Nov-2016 |
Patrick Bruenn <p.bruenn@beckhoff.com> |
arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC Add CX9020 board based on mx53loco. Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse serial_mxc with DTE and prepare for device tree migration of other functions and imx53 devices. The CX9020 differs from i.MX53 Quick Start Board by: - use uart2 instead of uart1 - DVI-D connector instead of VGA - no audio - CCAT FPGA connected to emi - enable rtc Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
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#
c4068dfb |
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02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Support i.MX7D Introudce i.MX7 pinctrl driver support. For now only i.MX7D supported. There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr. To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg and conf_reg can begin at 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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#
745df68d |
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02-Feb-2016 |
Peng Fan <van.freenix@gmail.com> |
pinctrl: imx: Introduce pinctrl driver for i.MX6 Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinctrl_ops implementation, only set_state is implemented. To i.MX6/7, the pinctrl dts entry is as following: &iomuxc { pinctrl-names = "default"; pinctrl_csi1: csi1grp { fsl,pins = < MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 >; }; [.....] }; there is no property named function or groups. So pinctrl_generic_set_state can not be used here. 5. This driver is a simple implementation for i.mx iomux controller, only parse the fsl,pins property and write value to registers. 6. With DEBUG enabled, we can see log when "i2c bus 0": " set_state_simple op missing imx_pinctrl_set_state: i2c1grp mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x14c val 0x10 select_input: offset 0x5d8 val 0x1 write config: offset 0x3bc val 0x7f mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x148 val 0x10 select_input: offset 0x5d4 val 0x1 write config: offset 0x3b8 val 0x7f " this means imx6 pinctrl driver works as expected. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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