#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a0cdece |
|
29-Aug-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Fix 'relatove' typo Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
a9331a33 |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: pinctrl: Add multi-ACPI control Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
0a6f333e |
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08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
74749f1e |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
0a6f333e |
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08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
74749f1e |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
74749f1e |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
0a6f333e |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
74749f1e |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
0a6f333e |
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08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
74749f1e |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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