#
aa227118 |
|
17-Jan-2024 |
Jagan Teki <jagan@edgeble.ai> |
phy: rockchip: Add Rockchip INNO HDMI PHY driver Add Rockchip INNO HDMI PHY driver for RK3328. Reference from linux-next phy-rockchip-inno-hdmi driver. Signed-off-by: Jagan Teki <jagan@edgeble.ai> |
#
7b57ca18 |
|
29-May-2023 |
Frank Wang <frank.wang@rock-chips.com> |
phy: rockchip: add usbdp combo phy driver This adds a new USBDP combo PHY with Samsung IP block driver. The PHY is a combo between USB 3.0 and DisplayPort alt mode. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> [eugen.hristev@collabora.com: ported to 2023.07, clean-up] Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
bf57dd58 |
|
24-Mar-2023 |
Chris Morgan <macromorgan@hotmail.com> |
drivers: phy: add Innosilicon DSI-DPHY driver Add support for the Innosilicon DSI-DPHY driver for Rockchip SOCs. The driver was ported from Linux and tested on a Rockchip RK3566 based device to query the panel ID via a DSI command. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
82220526 |
|
17-Feb-2023 |
Jagan Teki <jagan@edgeble.ai> |
drivers: phy: add naneng combphy for rk3568 RK3568 has three combo phys, and PCIe/USB3/SATA/QSGMII controllers share one pipe interface for each combo phy, here is the diagram of the complex connection. +----------------+ | | +------+ | USB3 OTG CTRL0 |---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY0 | +----------------+ | | | | | | | | +------------+ | SATA CTRL0 |---->| | | | +------+ +----------------+ +----------------+ | | +------+ | USB3 HOST CTRL1|---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY1 | +----------------+ | | | | | |---->| | +------------+ | SATA CTRL1 | -->| | | | | +------+ +----------------+ | | +----------------+ | | | | +------+ | QSGMII CTRL |---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY2 | +----------------+ | | | | | |---->| | +------------+ | SATA CTRL2 | -->| | | | | +------+ +----------------+ | | +----------------+ | | | | | PCIe2 1-Lane |--- | | +----------------+ Co-developed-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Co-developed-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
9ddc0787 |
|
15-Jan-2021 |
Shawn Lin <shawn.lin@rock-chips.com> |
pci: Add Rockchip dwc based PCIe controller driver Add Rockchip dwc based PCIe controller driver for rk356x platform. Driver support Gen3 by operating as a Root complex. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> |
#
6ec62b6c |
|
15-Jan-2021 |
Shawn Lin <shawn.lin@rock-chips.com> |
phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY Add the Rockchip Synopsys based PCIe 3.0 PHY driver as part of Generic PHY framework. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> |
#
7bdeb4ef |
|
09-Jul-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: Add Rockchip PCIe PHY driver Add the Rockchip PCIe PHY driver as part of Generic PHY framework. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
214de087 |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB TypeC PHY driver Add USB TYPEC PHY driver for rockchip platform. Referenced from Linux TypeC PHY driver, currently supporting usb3-port and dp-port need to add it in the future. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
ac97a9ec |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB2PHY driver Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
7b57ca18 |
|
29-May-2023 |
Frank Wang <frank.wang@rock-chips.com> |
phy: rockchip: add usbdp combo phy driver This adds a new USBDP combo PHY with Samsung IP block driver. The PHY is a combo between USB 3.0 and DisplayPort alt mode. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> [eugen.hristev@collabora.com: ported to 2023.07, clean-up] Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
bf57dd58 |
|
24-Mar-2023 |
Chris Morgan <macromorgan@hotmail.com> |
drivers: phy: add Innosilicon DSI-DPHY driver Add support for the Innosilicon DSI-DPHY driver for Rockchip SOCs. The driver was ported from Linux and tested on a Rockchip RK3566 based device to query the panel ID via a DSI command. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
82220526 |
|
17-Feb-2023 |
Jagan Teki <jagan@edgeble.ai> |
drivers: phy: add naneng combphy for rk3568 RK3568 has three combo phys, and PCIe/USB3/SATA/QSGMII controllers share one pipe interface for each combo phy, here is the diagram of the complex connection. +----------------+ | | +------+ | USB3 OTG CTRL0 |---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY0 | +----------------+ | | | | | | | | +------------+ | SATA CTRL0 |---->| | | | +------+ +----------------+ +----------------+ | | +------+ | USB3 HOST CTRL1|---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY1 | +----------------+ | | | | | |---->| | +------------+ | SATA CTRL1 | -->| | | | | +------+ +----------------+ | | +----------------+ | | | | +------+ | QSGMII CTRL |---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY2 | +----------------+ | | | | | |---->| | +------------+ | SATA CTRL2 | -->| | | | | +------+ +----------------+ | | +----------------+ | | | | | PCIe2 1-Lane |--- | | +----------------+ Co-developed-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Co-developed-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
9ddc0787 |
|
15-Jan-2021 |
Shawn Lin <shawn.lin@rock-chips.com> |
pci: Add Rockchip dwc based PCIe controller driver Add Rockchip dwc based PCIe controller driver for rk356x platform. Driver support Gen3 by operating as a Root complex. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> |
#
6ec62b6c |
|
15-Jan-2021 |
Shawn Lin <shawn.lin@rock-chips.com> |
phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY Add the Rockchip Synopsys based PCIe 3.0 PHY driver as part of Generic PHY framework. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> |
#
7bdeb4ef |
|
09-Jul-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: Add Rockchip PCIe PHY driver Add the Rockchip PCIe PHY driver as part of Generic PHY framework. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
214de087 |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB TypeC PHY driver Add USB TYPEC PHY driver for rockchip platform. Referenced from Linux TypeC PHY driver, currently supporting usb3-port and dp-port need to add it in the future. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
ac97a9ec |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB2PHY driver Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
bf57dd58 |
|
24-Mar-2023 |
Chris Morgan <macromorgan@hotmail.com> |
drivers: phy: add Innosilicon DSI-DPHY driver Add support for the Innosilicon DSI-DPHY driver for Rockchip SOCs. The driver was ported from Linux and tested on a Rockchip RK3566 based device to query the panel ID via a DSI command. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
82220526 |
|
17-Feb-2023 |
Jagan Teki <jagan@edgeble.ai> |
drivers: phy: add naneng combphy for rk3568 RK3568 has three combo phys, and PCIe/USB3/SATA/QSGMII controllers share one pipe interface for each combo phy, here is the diagram of the complex connection. +----------------+ | | +------+ | USB3 OTG CTRL0 |---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY0 | +----------------+ | | | | | | | | +------------+ | SATA CTRL0 |---->| | | | +------+ +----------------+ +----------------+ | | +------+ | USB3 HOST CTRL1|---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY1 | +----------------+ | | | | | |---->| | +------------+ | SATA CTRL1 | -->| | | | | +------+ +----------------+ | | +----------------+ | | | | +------+ | QSGMII CTRL |---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY2 | +----------------+ | | | | | |---->| | +------------+ | SATA CTRL2 | -->| | | | | +------+ +----------------+ | | +----------------+ | | | | | PCIe2 1-Lane |--- | | +----------------+ Co-developed-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Co-developed-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
9ddc0787 |
|
15-Jan-2021 |
Shawn Lin <shawn.lin@rock-chips.com> |
pci: Add Rockchip dwc based PCIe controller driver Add Rockchip dwc based PCIe controller driver for rk356x platform. Driver support Gen3 by operating as a Root complex. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> |
#
6ec62b6c |
|
15-Jan-2021 |
Shawn Lin <shawn.lin@rock-chips.com> |
phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY Add the Rockchip Synopsys based PCIe 3.0 PHY driver as part of Generic PHY framework. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> |
#
7bdeb4ef |
|
09-Jul-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: Add Rockchip PCIe PHY driver Add the Rockchip PCIe PHY driver as part of Generic PHY framework. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
214de087 |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB TypeC PHY driver Add USB TYPEC PHY driver for rockchip platform. Referenced from Linux TypeC PHY driver, currently supporting usb3-port and dp-port need to add it in the future. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
ac97a9ec |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB2PHY driver Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
82220526 |
|
17-Feb-2023 |
Jagan Teki <jagan@edgeble.ai> |
drivers: phy: add naneng combphy for rk3568 RK3568 has three combo phys, and PCIe/USB3/SATA/QSGMII controllers share one pipe interface for each combo phy, here is the diagram of the complex connection. +----------------+ | | +------+ | USB3 OTG CTRL0 |---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY0 | +----------------+ | | | | | | | | +------------+ | SATA CTRL0 |---->| | | | +------+ +----------------+ +----------------+ | | +------+ | USB3 HOST CTRL1|---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY1 | +----------------+ | | | | | |---->| | +------------+ | SATA CTRL1 | -->| | | | | +------+ +----------------+ | | +----------------+ | | | | +------+ | QSGMII CTRL |---->| | | | | | +------------+ +----------------+ | PIPE | | | | MUX |---->| Combo PHY2 | +----------------+ | | | | | |---->| | +------------+ | SATA CTRL2 | -->| | | | | +------+ +----------------+ | | +----------------+ | | | | | PCIe2 1-Lane |--- | | +----------------+ Co-developed-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Co-developed-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
9ddc0787 |
|
15-Jan-2021 |
Shawn Lin <shawn.lin@rock-chips.com> |
pci: Add Rockchip dwc based PCIe controller driver Add Rockchip dwc based PCIe controller driver for rk356x platform. Driver support Gen3 by operating as a Root complex. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> |
#
6ec62b6c |
|
15-Jan-2021 |
Shawn Lin <shawn.lin@rock-chips.com> |
phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY Add the Rockchip Synopsys based PCIe 3.0 PHY driver as part of Generic PHY framework. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> |
#
7bdeb4ef |
|
09-Jul-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: Add Rockchip PCIe PHY driver Add the Rockchip PCIe PHY driver as part of Generic PHY framework. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
214de087 |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB TypeC PHY driver Add USB TYPEC PHY driver for rockchip platform. Referenced from Linux TypeC PHY driver, currently supporting usb3-port and dp-port need to add it in the future. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
ac97a9ec |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB2PHY driver Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
9ddc0787 |
|
15-Jan-2021 |
Shawn Lin <shawn.lin@rock-chips.com> |
pci: Add Rockchip dwc based PCIe controller driver Add Rockchip dwc based PCIe controller driver for rk356x platform. Driver support Gen3 by operating as a Root complex. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> |
#
6ec62b6c |
|
15-Jan-2021 |
Shawn Lin <shawn.lin@rock-chips.com> |
phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY Add the Rockchip Synopsys based PCIe 3.0 PHY driver as part of Generic PHY framework. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> |
#
7bdeb4ef |
|
09-Jul-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: Add Rockchip PCIe PHY driver Add the Rockchip PCIe PHY driver as part of Generic PHY framework. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
214de087 |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB TypeC PHY driver Add USB TYPEC PHY driver for rockchip platform. Referenced from Linux TypeC PHY driver, currently supporting usb3-port and dp-port need to add it in the future. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
ac97a9ec |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB2PHY driver Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
7bdeb4ef |
|
09-Jul-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: Add Rockchip PCIe PHY driver Add the Rockchip PCIe PHY driver as part of Generic PHY framework. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
214de087 |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB TypeC PHY driver Add USB TYPEC PHY driver for rockchip platform. Referenced from Linux TypeC PHY driver, currently supporting usb3-port and dp-port need to add it in the future. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
ac97a9ec |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB2PHY driver Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
214de087 |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB TypeC PHY driver Add USB TYPEC PHY driver for rockchip platform. Referenced from Linux TypeC PHY driver, currently supporting usb3-port and dp-port need to add it in the future. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
ac97a9ec |
|
25-May-2020 |
Jagan Teki <jagan@amarulasolutions.com> |
phy: rockchip: Add Rockchip USB2PHY driver Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |