#
8db017c8 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
pci: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2105cd04 |
|
26-Nov-2021 |
Marek Behún <kabel@kernel.org> |
fdt_support: Remove FDT_STATUS_FAIL_ERROR_CODE Since no one uses this feature and I am not aware of any parsers of this in Linux, remove it. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Pratyush Yadav <p.yadav@ti.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Michael Walle <michael@walle.cc> Cc: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
be384160 |
|
09-Nov-2021 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: layerscape: Fix the LUT and msi-map mismatch issue In the current code, it doesn't reset the cursors of LUT entry and StreamID at the beginning of the fixup, so it can result in LUT entry setup and msi-map mismatch and LUT entries and StreamID leaking when reload and fixup the DTB. This patch move the initialization of LUT entry and StreamID cursors to the beginning of the fixup to resolve the issues. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
8b85dfc6 |
|
16-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: Avoid accessing seq directly At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
51a4a857 |
|
19-Jul-2020 |
Simon Glass <sjg@chromium.org> |
pci: Drop dm.h inclusion from header file The layerscape header should not include dm.h so remove it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d20eb7a6 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Move streamId allocation to common device tree fixup Move streamId allocation to layerscape common device tree fixup. Calculate streamId based on SoC variant. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1185b229 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Common device tree fixup for NXP SoCs Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
63618e71 |
|
30-Nov-2019 |
Pankaj Bansal <pankaj.bansal@nxp.com> |
pci: layerscape: Manage PCIe EP compatible string via Kconfig The ep node device tree name is governed by these bindings: https://github.com/torvalds/linux/blob/master/Documentation/ devicetree/bindings/pci/layerscape-pci.txt#L24 As per above the ep compatible node contains platform name. Therefore, define the ep node compatible as CONFIG to find the pcie ep node in device tree during device tree fixup. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7cd42728 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM for lx2160a. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
0b964b03 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape_gen4: Suffix API names with _ls_gen4 Update API names for layerscape gen4 fixup. Suffix layerscape_gen4 fixup API names with _ls_gen4. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1d341bc4 |
|
08-Apr-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs Add the infrastructure for Layerscape SoCs PCIe Gen4 controller to update device tree nodes to convey SMMU stream IDs in the device tree. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
2105cd04 |
|
26-Nov-2021 |
Marek Behún <marek.behun@nic.cz> |
fdt_support: Remove FDT_STATUS_FAIL_ERROR_CODE Since no one uses this feature and I am not aware of any parsers of this in Linux, remove it. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Pratyush Yadav <p.yadav@ti.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Michael Walle <michael@walle.cc> Cc: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
be384160 |
|
09-Nov-2021 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: layerscape: Fix the LUT and msi-map mismatch issue In the current code, it doesn't reset the cursors of LUT entry and StreamID at the beginning of the fixup, so it can result in LUT entry setup and msi-map mismatch and LUT entries and StreamID leaking when reload and fixup the DTB. This patch move the initialization of LUT entry and StreamID cursors to the beginning of the fixup to resolve the issues. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
8b85dfc6 |
|
16-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: Avoid accessing seq directly At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
51a4a857 |
|
19-Jul-2020 |
Simon Glass <sjg@chromium.org> |
pci: Drop dm.h inclusion from header file The layerscape header should not include dm.h so remove it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d20eb7a6 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Move streamId allocation to common device tree fixup Move streamId allocation to layerscape common device tree fixup. Calculate streamId based on SoC variant. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1185b229 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Common device tree fixup for NXP SoCs Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
63618e71 |
|
30-Nov-2019 |
Pankaj Bansal <pankaj.bansal@nxp.com> |
pci: layerscape: Manage PCIe EP compatible string via Kconfig The ep node device tree name is governed by these bindings: https://github.com/torvalds/linux/blob/master/Documentation/ devicetree/bindings/pci/layerscape-pci.txt#L24 As per above the ep compatible node contains platform name. Therefore, define the ep node compatible as CONFIG to find the pcie ep node in device tree during device tree fixup. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7cd42728 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM for lx2160a. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
0b964b03 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape_gen4: Suffix API names with _ls_gen4 Update API names for layerscape gen4 fixup. Suffix layerscape_gen4 fixup API names with _ls_gen4. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1d341bc4 |
|
08-Apr-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs Add the infrastructure for Layerscape SoCs PCIe Gen4 controller to update device tree nodes to convey SMMU stream IDs in the device tree. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
be384160 |
|
09-Nov-2021 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: layerscape: Fix the LUT and msi-map mismatch issue In the current code, it doesn't reset the cursors of LUT entry and StreamID at the beginning of the fixup, so it can result in LUT entry setup and msi-map mismatch and LUT entries and StreamID leaking when reload and fixup the DTB. This patch move the initialization of LUT entry and StreamID cursors to the beginning of the fixup to resolve the issues. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
8b85dfc6 |
|
16-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: Avoid accessing seq directly At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
51a4a857 |
|
19-Jul-2020 |
Simon Glass <sjg@chromium.org> |
pci: Drop dm.h inclusion from header file The layerscape header should not include dm.h so remove it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d20eb7a6 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Move streamId allocation to common device tree fixup Move streamId allocation to layerscape common device tree fixup. Calculate streamId based on SoC variant. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1185b229 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Common device tree fixup for NXP SoCs Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
63618e71 |
|
30-Nov-2019 |
Pankaj Bansal <pankaj.bansal@nxp.com> |
pci: layerscape: Manage PCIe EP compatible string via Kconfig The ep node device tree name is governed by these bindings: https://github.com/torvalds/linux/blob/master/Documentation/ devicetree/bindings/pci/layerscape-pci.txt#L24 As per above the ep compatible node contains platform name. Therefore, define the ep node compatible as CONFIG to find the pcie ep node in device tree during device tree fixup. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7cd42728 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM for lx2160a. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
0b964b03 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape_gen4: Suffix API names with _ls_gen4 Update API names for layerscape gen4 fixup. Suffix layerscape_gen4 fixup API names with _ls_gen4. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1d341bc4 |
|
08-Apr-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs Add the infrastructure for Layerscape SoCs PCIe Gen4 controller to update device tree nodes to convey SMMU stream IDs in the device tree. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
8b85dfc6 |
|
16-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: Avoid accessing seq directly At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
51a4a857 |
|
19-Jul-2020 |
Simon Glass <sjg@chromium.org> |
pci: Drop dm.h inclusion from header file The layerscape header should not include dm.h so remove it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d20eb7a6 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Move streamId allocation to common device tree fixup Move streamId allocation to layerscape common device tree fixup. Calculate streamId based on SoC variant. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1185b229 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Common device tree fixup for NXP SoCs Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
63618e71 |
|
30-Nov-2019 |
Pankaj Bansal <pankaj.bansal@nxp.com> |
pci: layerscape: Manage PCIe EP compatible string via Kconfig The ep node device tree name is governed by these bindings: https://github.com/torvalds/linux/blob/master/Documentation/ devicetree/bindings/pci/layerscape-pci.txt#L24 As per above the ep compatible node contains platform name. Therefore, define the ep node compatible as CONFIG to find the pcie ep node in device tree during device tree fixup. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7cd42728 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM for lx2160a. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
0b964b03 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape_gen4: Suffix API names with _ls_gen4 Update API names for layerscape gen4 fixup. Suffix layerscape_gen4 fixup API names with _ls_gen4. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1d341bc4 |
|
08-Apr-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs Add the infrastructure for Layerscape SoCs PCIe Gen4 controller to update device tree nodes to convey SMMU stream IDs in the device tree. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
51a4a857 |
|
19-Jul-2020 |
Simon Glass <sjg@chromium.org> |
pci: Drop dm.h inclusion from header file The layerscape header should not include dm.h so remove it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d20eb7a6 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Move streamId allocation to common device tree fixup Move streamId allocation to layerscape common device tree fixup. Calculate streamId based on SoC variant. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1185b229 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Common device tree fixup for NXP SoCs Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
63618e71 |
|
30-Nov-2019 |
Pankaj Bansal <pankaj.bansal@nxp.com> |
pci: layerscape: Manage PCIe EP compatible string via Kconfig The ep node device tree name is governed by these bindings: https://github.com/torvalds/linux/blob/master/Documentation/ devicetree/bindings/pci/layerscape-pci.txt#L24 As per above the ep compatible node contains platform name. Therefore, define the ep node compatible as CONFIG to find the pcie ep node in device tree during device tree fixup. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7cd42728 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM for lx2160a. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
0b964b03 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape_gen4: Suffix API names with _ls_gen4 Update API names for layerscape gen4 fixup. Suffix layerscape_gen4 fixup API names with _ls_gen4. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1d341bc4 |
|
08-Apr-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs Add the infrastructure for Layerscape SoCs PCIe Gen4 controller to update device tree nodes to convey SMMU stream IDs in the device tree. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d20eb7a6 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Move streamId allocation to common device tree fixup Move streamId allocation to layerscape common device tree fixup. Calculate streamId based on SoC variant. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1185b229 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Common device tree fixup for NXP SoCs Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
63618e71 |
|
30-Nov-2019 |
Pankaj Bansal <pankaj.bansal@nxp.com> |
pci: layerscape: Manage PCIe EP compatible string via Kconfig The ep node device tree name is governed by these bindings: https://github.com/torvalds/linux/blob/master/Documentation/ devicetree/bindings/pci/layerscape-pci.txt#L24 As per above the ep compatible node contains platform name. Therefore, define the ep node compatible as CONFIG to find the pcie ep node in device tree during device tree fixup. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7cd42728 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM for lx2160a. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
0b964b03 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape_gen4: Suffix API names with _ls_gen4 Update API names for layerscape gen4 fixup. Suffix layerscape_gen4 fixup API names with _ls_gen4. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1d341bc4 |
|
08-Apr-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs Add the infrastructure for Layerscape SoCs PCIe Gen4 controller to update device tree nodes to convey SMMU stream IDs in the device tree. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d20eb7a6 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Move streamId allocation to common device tree fixup Move streamId allocation to layerscape common device tree fixup. Calculate streamId based on SoC variant. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1185b229 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Common device tree fixup for NXP SoCs Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
63618e71 |
|
30-Nov-2019 |
Pankaj Bansal <pankaj.bansal@nxp.com> |
pci: layerscape: Manage PCIe EP compatible string via Kconfig The ep node device tree name is governed by these bindings: https://github.com/torvalds/linux/blob/master/Documentation/ devicetree/bindings/pci/layerscape-pci.txt#L24 As per above the ep compatible node contains platform name. Therefore, define the ep node compatible as CONFIG to find the pcie ep node in device tree during device tree fixup. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7cd42728 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM for lx2160a. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
0b964b03 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape_gen4: Suffix API names with _ls_gen4 Update API names for layerscape gen4 fixup. Suffix layerscape_gen4 fixup API names with _ls_gen4. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1d341bc4 |
|
08-Apr-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs Add the infrastructure for Layerscape SoCs PCIe Gen4 controller to update device tree nodes to convey SMMU stream IDs in the device tree. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
d20eb7a6 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Move streamId allocation to common device tree fixup Move streamId allocation to layerscape common device tree fixup. Calculate streamId based on SoC variant. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1185b229 |
|
05-Jan-2020 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape: Common device tree fixup for NXP SoCs Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
63618e71 |
|
30-Nov-2019 |
Pankaj Bansal <pankaj.bansal@nxp.com> |
pci: layerscape: Manage PCIe EP compatible string via Kconfig The ep node device tree name is governed by these bindings: https://github.com/torvalds/linux/blob/master/Documentation/ devicetree/bindings/pci/layerscape-pci.txt#L24 As per above the ep compatible node contains platform name. Therefore, define the ep node compatible as CONFIG to find the pcie ep node in device tree during device tree fixup. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7cd42728 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM for lx2160a. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
0b964b03 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape_gen4: Suffix API names with _ls_gen4 Update API names for layerscape gen4 fixup. Suffix layerscape_gen4 fixup API names with _ls_gen4. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1d341bc4 |
|
08-Apr-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs Add the infrastructure for Layerscape SoCs PCIe Gen4 controller to update device tree nodes to convey SMMU stream IDs in the device tree. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
63618e71 |
|
30-Nov-2019 |
Pankaj Bansal <pankaj.bansal@nxp.com> |
pci: layerscape: Manage PCIe EP compatible string via Kconfig The ep node device tree name is governed by these bindings: https://github.com/torvalds/linux/blob/master/Documentation/ devicetree/bindings/pci/layerscape-pci.txt#L24 As per above the ep compatible node contains platform name. Therefore, define the ep node compatible as CONFIG to find the pcie ep node in device tree during device tree fixup. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7cd42728 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM for lx2160a. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
0b964b03 |
|
15-Nov-2019 |
Wasim Khan <wasim.khan@nxp.com> |
pci: layerscape_gen4: Suffix API names with _ls_gen4 Update API names for layerscape gen4 fixup. Suffix layerscape_gen4 fixup API names with _ls_gen4. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
1d341bc4 |
|
08-Apr-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs Add the infrastructure for Layerscape SoCs PCIe Gen4 controller to update device tree nodes to convey SMMU stream IDs in the device tree. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
1d341bc4 |
|
08-Apr-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs Add the infrastructure for Layerscape SoCs PCIe Gen4 controller to update device tree nodes to convey SMMU stream IDs in the device tree. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |